External debug refers to debug software running somewhere else, debugging the RISC-V platform via a debug transport like JTAG. The entire document provides features that are useful for external debug.

Using SmartDebug, you can debug Microchip FPGA arrays and SerDes via their respective Joint Test Action Group (JTAG) port(s) without requiring an internal logic analyzer. SmartDebug can also …

If you are an SoC designer, this guide helps you design debug and trace infrastructure using Arm CoreSight IP products such as the CoreSight SoC components. It gives a high-level view of the goals …

This document serves as a guide for using the CY8CKIT-005 MiniProg4 Program and Debug Kit. The document explains about the kit operation and technical description of the board.

This chapter provides a global overview of the main elements composing the ecosystem, outlining debug features and useful pointers, in order to guide the user among available resources.

In this week’s lab, you will get to practice an essential skill in computer science: debugging. This worksheet will get you familiar with some “best practices” and questions to ask yourself when …

This application note discusses the best practices for debugging a system that uses the I2C to communicate between devices. Suggested methods for dealing with NACKs are described in detail, …